[Embedded Systems Conference] eAsic platform to boost ASIC/ASSP innovation, cut development cost
Story posted on: April 04, 2007
"We are faced with this Darwinian struggle. While the demand for differentiated silicon is actually going up, it has become prohibitive to produce these highly customised chips. To a point where only the fittest, the strongest, the largest, are able to customise in silicon", said Ronnie Vasishta.According to the executive, eAsic's platform abstracts the complexity of designing ASICs while lowering the overall development cost and accelerate time to market (no mask charges, no minimum order quantity, volume shipment available, four weeks only to manufacture, at least one week of design time for 5 million gates, no IR drop analysis, no signal integrity analysis, no back-end crosstalk analysis...).
"It's an attractive value proposition for both start-up companies and for system OEMs that can continue to innovate and differentiate their products in silicon, versus differentiating through channel, brand... strategies", told Vasishta.
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